© 2001 HDDC


HDDC has a complete environment for digital ASIC/SoC/FPGA design, firmware and application development, and bench testing of prototypes.  Our design environment includes the following software tools:
  • Hardware
    • PC Based workstations running Windows and Linux
    • Digital Scope/Logic Analyzer
  • Software Development
    • Microsoft Visual Studio Professional .NET with WinDDK
    • CCS C Compiler(PIC)
    • Keil uVision(8051)
  • Simulation
    • Verilog -- Synapticad Verilogger and ModelSim Verilog
    • VHDL -- ModelSim VHDL
    • Tanner T-Spice
  • Hardware Design
    • Schematic Capture - Viewlogic ePD Schematic Capture
    • Logic Synthesis - Leonardo Spectrum ASIC and FPGA synthesis, Xilinx ISE
    • Verification Planning - Severity1 Relay
    • Documentation - FrameMaker, Word, WaveFormer, Visio Technical
    • Custom scripts and tools to implement mixed HDL and schematic based design flow.
    • Custom scripts for design management and issue tracking.
In addition, our engineers are experienced with such industry standard tools as Specman Elite, Vera, and  Synopsys Design Compiler.  For system bring up, we are experienced with logic analyzers, oscilloscopes, CATC(LeCroy) Protocol Analyzers, picoprobes, and emulation systems.