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Our engineers are experienced in all phases of the FPGA/ASIC/SoC
development process from specification development, through design,
synthesis and verification. Over the years, our engineers have
worked on projects ranging from DRAM memory design to data compression
IP cores, and Universal Serial Bus components. A sampling of our
recent projects is shown below.
Since
1998, HDDC has worked on a wide variety of USB designs
for a number of clients. Starting with USB 1.1 Host and Device
designs, our expertise has grown along with the USB standard
itself. Current projects focus on USB 2.0 and USB 3.0,
- Hosts, Devices, On-The-Go products, and integration/verification of
both on-chip and off-chip UTMI+ Low Pin Count Interface(ULPI) and
UTMI+ PHY products.
- High-Speed USB 2.0 Camera Interface
- Cypress EZUSB-FX2 Based. Achieves 50Mbyte/sec on High-Speed USB.
- HDDC provided
Xilinx Spartan 3e FPGA designs,embedded firmware, debug support , USB customer
support and application interface debug/support.
- USB OTG SoC Integration
- Work with SoC team to integrate purchased USB Host/OTG controllers into SoC.
- Develop verification plan.
- Provide training and debug support for the SoC.
- USB to Serial Adaptor
- Developed HID class based driver and 8051 firmware to make embedded UART appear to PC as a standard COM port.
- USB Firmware Debug
- Took
over partially completed USB device implementation, debugged and
reworked it to help client get their product released to production.
Worked with application programmer to optimize interface to
application code, and debug driver environment.
- Custom UTMI+/ULPI e language verification models.
- Hard Disk Controller Coverage Driven Verification Plan Development.
- Storage
Area Network Host Bus Adaptor SoC Functional Verification
Plan
- Microprocessor control interface Functional
Verification
Environment and Verification Implementation.
- 400Mhz 130nm Content Addressable Memory
- PCI Express/Xilinx Virtex-4 Product Debug and Bringup
- Gigabit Ethernet embedded web server on Xilinx Spartan3e with Microblaze CPU.
- Embedded USB Host using Opencores.org USBHOSTSLAVE module.
- Development of custom training material for USB 2.0 Enhanced Host Controller Interface(EHCI).
- Rework and debug Xilinx FPGA design from mid-90's. All original tools are obsolete/unavailable.
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